The present invention relates to a semiconductor device comprising a semiconductor body having at least a first and a second bipolar complementary vertical transistor, each transistor comprising a base region and two external regions serving as emitter and collector regions, the said body being constituted by a substrate covered by a first epitaxial layer of a first conductivity type on which extends a second epitaxial layer of the second conductivity type opposite to the first, the base region of the first transistor and at least a part of an external region of the second transistor being formed by coplanar portions of the first epitaxial layer, the base region of the second transistor and an external region of the first transistor being formed by coplanar portions of the second epitaxial layer and a portion of the substrate constituting at least a part of the collector region of one of the transistors, an insulating barrier separating at least a part of the said portions of the second epitaxial layer entirely from each other.
For various applications, in particular in power amplification, it is desired to obtain monolithic semiconductor devices in which at least two complementary active elements are integrated, for example, two transistors of which the corresponding regions are of opposite types; this is the case in amplifier devices of the so-called mixed Darlington type comprising an input or control transistor, for example of the pnp-type, of which the collector controls the base of an output or power transistor, the emitter of the input transistor being connected to the collector of the output transistor.
The two transistors may be integrated in a substrate plate by means of known methods of epitaxial deposition and diffusion. An example of a structure thus obtained has been described in a French patent application published under No. 2,297,495. This structure offers considerable advantages, in particular with regard to gain, and flatness of the active face, which permits good ohmic surface connections. However, the connection between the emitter of the input transistor and the collector of the output transistor of the Darlington assembly described in said Patent Application necessitates a metallic connection reaching the bottom of a mesa groove, which in certain cases may present difficulties. In addition, the connection between the collector of the input transistor and the base of the output transistor is an internal connection realized by the continuity between these two regions in the same epitaxial layer, which necessitates a highly doped localized buried layer. In spite of said buried layer, the resistance of this connection may still be too high in certain applications. Moreover, the very high doping of said layer involves difficulties in epitaxy due to the migration towards the epitaxial layers of impurities from the highly doped layer.